Flash memory is a type of semiconductor computer memory with many desirable characteristics. Like read only memory, ROM, it is non-volatile, meaning that the contents of the memory are stable and retained without applied electrical power.
A major advantage of flash over ROM is that the memory contents of flash may be changed after the device is manufactured. Flash memory has found wide acceptance in many types of computers, including desktop computers, mobile phones and hand held computers. Flash memory is also widely used in digital cameras and portable digital music players, for example “MP3” players.
In addition to direct flash storage applications, for example in video cameras, flash-based storage devices are replacing rotating magnetic disks, sometimes known as hard drives, in many applications. Compared to hard drives, flash is significantly more rugged, quieter, lower power, and for some densities such a flash based device may be smaller than a comparable hard drive.
Silicon nitride based flash memory has many advantages as compared to its floating gate and tunneling oxide based counterparts. Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) is potentially very dense in terms of number of cells per unit area that can be used and it requires fewer process steps as compared to floating gate memory. Moreover, it can be easily integrated with standard SRAM process technology. A further advantage of using SONOS devices is their suitability for applications requiring large temperature variations and radiation hardening.
FIG. 1 shows a Silicon-oxide-nitride-oxide-silicon (SONOS) memory cell 10 as has been well known in the conventional art. The SONOS stack is a gate dielectric stack and consists of a single layer of polysilicon, a triple stack ONO (Oxide-Nitride-Oxide) gate dielectric layer and a MOS channel. The ONO structure may consist of a tunnel oxide 12a with thickness between 16 and 22 angstroms, a nitride memory storage layer 12b of equivalent electrical oxide thickness of 100 angstroms and a blocking oxide layer 12c approximately 40 angstroms thick.
The technology may consist of a double diffused well process with deep N-well for the memory array, which may contain a P well. The double diffused well allows the SONOS to be integrated into a P-type substrate CMOS process. It may have a single level of poly and the memory transistor uses an ONO stack for gate dielectric.
By appropriate design, the roles of N channel 20 and N channel 25 may be reversed. More specifically, at some times N channel 20 may function as a source for cell 10, and at other times N channel may function as a drain for cell 10. Likewise, N channel 25 may at times function as a drain, and at other times function as a source. Consequently, it is possible to store charge in nitride memory storage layer 12b in physical proximity to both N channel 20 and N channel 25. For example, charge 20a is “near” N channel 20, and charge 25a is “near” N channel 25.
It is further possible to minimize the interaction between change 20a and charge 25a, such that they are effectively independent, and may represent separate bits of stored non-volatile information. In this manner, a single SONOS memory cell 10 may actually store two bits of information. A second bit stored in a single cell in this manner is identified by AMD Corporation of Santa Clara, Calif. as a “Mirror Bit™”.
Using technologies such as SONOS and Mirror Bit™, very dense arrays of flash memory have been produced and marketed. Typically large flash memory semiconductors are divided into a hierarchy of regions, for example for control and redundancy purposes. For example, a flash memory device may have a fundamental word size of 16 bits. Words may be grouped into four-word groups called pages. Pages may be further grouped into sectors composed of 8k (k=1024) pages, or 32k words. The entire device may comprise, for example, 128 sectors.
In order to increase the density (number of cells per unit area) of a flash device, in the prior art there is typically only a single common array ground path for each sector. Portions of a cell, e.g., the source or drain, must be electrically connected (“switched”) to ground for common operations, for example reading and programming the cell. Unfortunately, the prior art use of a single ground per sector limits all cells of each sector to one type of operation. More particularly, individual pages (a portion of a sector) can not be written or read independently of full sector operations. Consequently, read and write operations must be performed at a sector level, which can be a very slow process, especially if a relatively small amount of data is to be read or written. Accordingly, it is highly desirable to impart page read and page write capabilities to high density mirror bit flash memory.